Seyong Ahn 안세용
- Email: seyongahn@snucad.snu.ac.kr
- Phone: +82-10-9290-1359
- Address: SNU Computer-Aided Laboratory, #062, School of Electrical and Computer Engineering, Seoul National Univ., 1, Gwanak-ro, Gwanak-gu, 08826, Seoul, Korea
- Lab: http://snucad.snu.ac.kr
Education
- Ph.D Candidate, SNU Computer-Aided Laboratory, Dept. of Electrical and Computer Engineering, Seoul National University, 2013.3 – current
Advisor: Prof. Taewhan Kim
- B.S., Dept. of Electrical and Computer Engineering, Seoul National University, 2009.3 – 2013.2
Research Area
- LC Resonant Clock Mesh Synthesis Methodology
- LC tank placement algorithm supporting Dynamic Voltage / Frequency Scaling (DVFS)
- Post buffer placement and sizing algorithm
- Algorithm for resonant frequencies selection among the wide range of operating frequency
while minimizing increase of power consumption
- Design Technology Co-Optimization (DTCO)
- Standard cell layout generator supporting planar and FinFET technologies
- Design rule and cell architecture co-evaluation framwork for DTCO
- Representative DTCO items exploration
Publications
- Journal Articles
- Seyong Ahn, Minseok Kang, Marios Papaefthymiou, and Taewhan Kim
Design Methodology for Synthesizing Resonant Clock Networks in the Presence of Dynamic Voltage / Frequency Scaling
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35. No. 12, pp. 2068-2081, December, 2016.
- Conference Proceedings
- Kyeongrok Jo, Seyong Ahn, Taewhan Kim, and Kyumyung Choi
Cohesive Techniques for Cell Layout Optimization Supporting 2D Metal-1 Routing Completion
IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), January 2018
- Seyong Ahn, Minseok Kang, Marios Papaefthymiou, and Taewhan Kim
Synthesis of Resonant Clock Networks Supporting Dynamic Voltage / Frequency Scaling
IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), January 2015
- Seyong Ahn, Minseok Kang, and Taewhan Kim
Power-Aware Inductor Analysis in Resonant Clock Networks
IEEE International SOC Design Conference (ISOCC), November 2013
Teaching and Assistantships
- Teaching Assistant
- Logic Design and Experiments
- Responsibilities: Conducting practive sesson every week, grading assignments and exams
- Semesters: 2013 Fall/Winter, 2014 Summer/Winter and 2015 Summer/Winter
- Digital Computer Concepts and Practice
- Responsibilities: Conducting practive sesson every week, grading assignments and exams
- Semesters: 2015 Spring, 2018 Spring